Often it is desired to run program code written for a computer processor of a first type (a subject processor) on a processor of a second type (a target processor). An emulator or translator may be used to perform program code conversion, such that a subject program (subject code) is able to run on the target processor.
When the translator is dynamically translating a subject program of a subject processor to a target processor, the translator must ensure that synchronous page faults occur in the same order that the subject program would have produced them when running on the subject platform.
One possible approach is to force the scheduled target code to order page faulting operations in the same order as they would appear in the subject program. However, this approach results in sub-optimal target code quality when the subject and target architectures are substantially different, e.g., the target architecture has different memory bandwidth and instruction groupings when compared to the subject architecture.